Products & Solutions
ARCŪ Configurable CPU/DSP Cores
Complete Spectrum of Cores: from the Industry's Smallest and Lowest Power, to 1000 DMIPS of Performance at Half the Size of Competing Cores.
ARC International pioneered configurable processor technology and is the market leader with close to 140 customers worldwide who collectively ship more than 300 million ARC-Based™ chips annually. ARC's patented configurable CPU/DSP cores enable SoC designers to build highly competitive products by easily customizing the processor to a target application. ARC's CPU/DSP cores can be optimized to achieve the highest performance, smallest size, and lowest power consumption of any 32-bit processors in their class.
All ARC processors utilize a 16-/32-bit ISA that provides both RISC and full DSP capabilities in a unified architecture. Cores may be used as-is, or quickly and easily customized to meet any application requirement: from ultra-small task-specific controllers, to programmable and robust application processor subsystems. All of ARC's processors are synthesizable, can be easily implemented in standard foundry processes, and are supported by a wide range of development tools.
Content On This Page
| Configurable Cores Product Range | ARC Energy PRO Family | ARC 600 Family |
| ARC 700 Family
| Configurable Floating Point Extensions | Configurable DSP Extensions |
| Real-Time Trace Extensions | ARChitect™ Configurator | ARCompact™ ISA |
| Energy PRO Technology |
Configurable Cores Product Range to Configurable Cores Offering
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ARC® Energy PRO Core Family
Ultra Low Power Cores
The ultimate in low-power processors; ideal for power- and energy-constrained environments, yet with sufficient performance to run RTOS-based applications.
ARC EP Core Family Architecture
32-bit devices with integrated power management hardware, design tools and
run-time software
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ARC EP20 Core:
Cacheless Energy PRO design with full RISC/DSP capabilities, that is configurable to make the industry’s smallest, lowest-power 32-bit licensable core
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ARC EP30 Core:
Complete processor solution equipped with Energy PRO technology for applications such as portable and mobile appliances, wireless connection management and RTOS-based systems
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ARC EP Technology
ARC's patented Energy PRO technology combines hardware IP, software and an advanced EDA flow, to offer a system-level solution for the design of ultra-low-power SoCs.
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ARC® 600 Core Family
Small, Low-Power Configurable 32-bit CPU/DSP Cores
Ultra small size and low power make the ARC 600 family of configurable cores ideal for cost sensitive real-time processing applications.
ARC 600 Core Family
Architecture
32-bit architecture employs a
five-
stage pipeline achieving 1.3
DMIPS/MHz
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ARC 610D Core:
Cacheless design and closely coupled single-cycle memories provide fast predictable computation
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ARC 605 Core:
Smallest configurable core
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ARC 625D Core:
Flexible memory design includes caches and closely coupled single cycle memories making it ideal for RTOS-based applications
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ARC® 700 Core Family
Power Efficient, High Performance Configurable 32-bit CPU/DSP Cores
Delivering over 1000 DMIPS at half the size and power of competing processors, ARC 700 configurable cores are ideal as general purpose processors for high performance OS based applications(e.g. Linux), as well as for the most demanding real-time control and signal processing tasks.
ARC 700 Core Family
Architecture
Configurable 32-bit architecture employs a highly efficient 7-stage pipeline, delivering over 1.5 DMIPS/MHz
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ARC 725D Core:
Fast processing and cache-based memory architecture make this core ideal for the most demanding RTOS-based applications
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ARC 710D Core:
With DSP extensions, closely coupled single-cycle memories and a high performance CPU, this core delivers fast predictable real-time computation
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ARC 750D Core:
High performing host processor with MMU-based memory subsystem supporting Linux and other high-end operating systems
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ARC® FPX Floating Point Extensions
The Most Area and Power Efficient Floating Point Unit Available
ARC FPX Floating Point Extensions are configurable options that add high performance, IEEE-compliant single and double precision math instructions to ARC cores with very small additional area and power.
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ARC® XY Advanced DSP Extensions
Full Performance DSP and RISC in a Unified Architecture
The ARC XY Advanced DSP Subsystem is a configurable option that adds the power of a true DSP engine to ARC’s cores, enabling complex signal processing functions such as dual FFT and Viterbi algorithms.
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SmaRT Realtime Trace Extension
Enables Rapid Software Debug with Minimal Increase in Die Size
ARC's Small Realtime Trace (SmaRT) extension speeds software development by providing valuable trace information to debuggers via a JTAG port. SmaRT requires only a very small additional die area.
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ARChitect™ Configurator
Easy-to-Use Desktop GUI Unlocks the Power of ARC's Patented Configurable Technology
ARChitect is a revolutionary configuration tool that enables customers to optimize an ARC core for their specific application by selecting from thousands of pre-configured options and by creating custom instruction extensions. With ARChitect's GUI-based development environment and simple drag-and-drop menu, users can create a unique core or subsystem in just a few minutes.
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ARCompact™ ISA
Used by More than 140 Companies Worldwide to Create 100+ Million SoCs per Year
ARC's powerful extendible instruction set architecture includes both 16- and 32-bit operations, with no overhead for switching modes. By mixing 16- and 32-bit instructions, compilers can achieve up to 40% improvement in code density over pure 32-bit architectures.
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