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ARChitect™ Processor Configurator

Powerful Design Tool Automates Configurability and Extendibility of ARC Cores


ARChitect is ARC’s revolutionary configuration tool that enables licensees to unlock the power of ARC’s patented CPU/DSP processors and multimedia subsystems. Using ARChitect's GUI-based development environment and simple drag-and-drop menu, system-on-chip (SoC) designers select from 20,000+ pre-configured options and/or create custom instruction extensions that are optimized to the 16-/32-bit ARCompact™ ISA.

In minutes, ARChitect generates a highly differentiated, proprietary ARC-Based™ processor or subsystem that consumes less power and has fewer transistor gates than can be created using a “fixed architecture” alternative.

Configurability optimizes die size and power

Designers can include features they need and remove features they do not need for their application using the ARChitect tool's drag-and-drop GUI. Configuration options include features around the core such as type and size of caches, interrupts, DSP subsystem, timers and debug components, as well as features within the core such as type and size of core registers, address widths, and instruction set options. Performance and die size tradeoffs are quickly accomplished, resulting in an optimized solution. The resulting core invariably will be smaller and lower power than cores with fixed configurations.

Extendibility optimizes application performance

Significant gains in application efficiency can be achieved by defining custom processor extensions. Using ARChitect's four step extension wizard, the designer can add instructions, registers and other logic to dramatically reduce the number of cycles required to execute inner loops and other critical code segments. The result is higher application performance and/or lower device frequency and power than can be achieved with fixed instruction set cores.

Automation optimizes the development process

The ARChitect tool produces verified RTL and synthesis scripts that are compatible with industry-standard design flows. In addition, it generates files and scripts which create a complete set of downstream development tools for the user's customized core, including test bench, simulators, compiler/debugger, prototyping platform and documentation. In this way, ARChitect streamlines design projects, reducing time-to-silicon and risk.

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Features

  • Easy-to-use GUI
  • Drag-and-drop components build a processor system
  • Template feature allows developers to create and recall standard designs for future modification
  • System gate count, speed and power automatically updates to enable early tradeoff analysis
  • Core configuration options include:
    • MMU
    • Instruction and data caches
    • Closely coupled memories
    • DSP instructions
    • ARC XY Advanced DSP subsystem
    • Internal register configurations
    • Internal bus widths
    • Debug components
    • Interrupts and timers
    • System interfaces
  • Four step wizard creates instruction extensions
  • Support for multi-processor designs
  • Generates verified RTL source code, simulation models, test benches, and synthesis scripts
  • Supports ARCangel FPGA-based prototyping platform
  • Generates extension files for simulators and compiler/debugger
  • Generates HTML documentation